Foundation IP Design Expert

We are looking for a seasoned Foundation IP Design Expert to drive the development of advanced standard cell libraries and Memory IP on leading‑edge process nodes. In this role, you will define key performance and reliability targets, design high‑performance circuits, and lead teams through full IP development and validation. The ideal candidate brings deep semiconductor physics expertise, extensive experience delivering complete IP libraries, and a strong track record in advanced‑node, high‑performance, and high‑reliability chip design.

Responsibilities

• Define performance, power, and reliability requirements for standard cells and Memory IPs.
• Conduct research and develop architecture for next‑generation standard cell libraries and Memory IP, including evaluation of industry trends and emerging technologies.
• Design performance‑critical circuits for both standard cells and Memory IP.
• Provide technical leadership and guidance to design engineers throughout the IP development cycle.
• Identify design issues, propose solutions, and ensure successful execution of standard cell and Memory IP projects.
• Design test‑chip structures and validation methodologies for silicon verification of standard cells and Memory IP.
• Work closely with layout teams to co‑optimize circuit and layout for performance and perform comprehensive library characterization.
• Develop and customize high‑performance, high‑reliability IPs for automotive and high‑performance computing SoCs.

Requirements

• Master's degree or higher in Electronics, Electrical Engineering, Communications, Computer Engineering, or related fields.
• At least 10 years of hands‑on experience in standard cell or Memory IP design.
• Strong foundation in microelectronics, semiconductor physics, and device behavior.
• Proven leadership in delivering complete standard cell libraries or Memory IP from design through signoff.
• Deep understanding of semiconductor device physics, reliability analysis, and process parameters in advanced nodes (3nm / 5nm / 7nm).
• Extensive experience in high‑performance, high‑reliability, and energy‑efficient circuit design; XTCO (system and design co‑optimization) preferred.
• Fast learner with strong initiative and the drive to explore new technologies and overcome technical challenges.
• Strong team player with meticulous attention to detail and a proactive, optimistic attitude.